Ni DOPING EFFECTS ON INDUCTANCE AND NEGATIVE CAPACITANCE IN MPS DEVICES
E.R. Bakhtiyarli1, I.M. Afandiyeva2, C.G. Akhundov2
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ABSTRACT

This study presents a comprehensive investigation of the negative capacitance behavior in Metal–Semiconductor (Au/n-Si MS) and Metal–Polymer–Semiconductor (MPS) structures (Au/Pure PVP/n-Si-MPS1 and Ni-doped PVP/n-Si-MPS2 and MPS3 SDs ), by correlating capacitance–voltage (C–V) characteristics with the voltage-dependent effective inductance L(V) in the bias interval of 2.0–3.6 V at 300 K. In this negative capacitance regime, the delayed response of interface and bulk traps produces a phase-shifted current, which manifests as a positive imaginary component in the impedance and can be interpreted as an effective inductive behavior. The L(V) curves extracted from the negative C–V regions exhibit a highly linear dependence on applied bias, with regression coefficients R² exceeding 0.985, confirming a uniform and single-mechanism trap response over the studied voltage range. The slopes dL/dV obtained from linear fits are approximately 6×10⁻⁶H/V for MPS1, 5×10⁻⁶H/V for MS, and 2×10⁻⁶H/V for MPS2 and MPS3, where steeper slopes directly correspond to higher trap densities and longer effective charge relaxation times, while shallower slopes indicate fewer active traps or faster trap emission. The nearly zero second derivative d²L/dV² demonstrates that the trap response is highly linear without noticeable nonlinear activation or saturation effects in this voltage interval. Complementary negative C–V measurements further validate the inductive interpretation, as the onset and evolution of negative capacitance are directly linked to the trap-mediated dynamic processes within the polymer interlayer and at the semiconductor interface. This combined slope–capacitance analysis provides a powerful framework for probing interfacial and bulk trap dynamics in MS and MPS structures, revealing that MPS1 exhibits the most pronounced negative capacitance and strongest trap activity.

Keywords: Negative capacitance, Metal–Polymer–Semiconductor (MPS) structures, Voltage-dependent inductance, Trap dynamics, Capacitance–voltage
(C–V) characteristics, Interface states.
DOI:10.70784/azip.1.2025327

Received: 02.09.2025
Internet publishing: 08.09.2025    AJP Fizika E 2025 03 en p.27-31

AUTHORS & AFFILIATIONS

1. Baku State University, Department of Physics, Baku, Azerbaijan
2. Baku State University, Institute for Physics Problems, Baku, Azerbaijan
E-mail: 1. elvinb18104@sabah.edu.az, 2. I_afandiyeva@yahoo.com, 2. ch.axundov@mail.ru

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